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[VHDL-FPGA-Verilog] SDRAM_simulation_model

Description: sdram的测试程序 和读写程序 vhdl语言编写的-SDRAM testing procedures and to read and write procedures VHDL language
Platform: | Size: 93184 | Author: 朱宝军 | Hits:

[VHDL-FPGA-Verilog] Micron_SDRAM_DDR2Simulation_model_Verilog

Description: DDR2 SDRAM仿真模型，适合于ModelSim下工作，请先阅读readme-DDR2 SDRAM Simulation Model which is suitable for modelsim. Please read readme file firstly.
Platform: | Size: 20480 | Author: rar | Hits:

[ARM-PowerPC-ColdFire-MIPS] sdram_samsung

Description: 三星SDRAM的verilog模型的完整源码-Verilog model of Samsung SDRAM complete source
Platform: | Size: 15360 | Author: liu | Hits:

[Other] sdram

Description: 在ISE开发环境下的单速率SDRAM简单读写控制器设计，用的是verilog硬件描述语言-ISE development environment in a single-rate SDRAM controller read and write simple design, using the verilog hardware description language
Platform: | Size: 157696 | Author: 小桂 | Hits:

[Other] FPGAbasedSDRAMControll

Description: 基于FPGA的SDRAM控制器 Realization FPGA-based SDRAM Controller with Verilog-FPGA-based SDRAM Controller Realization FPGA-based SDRAM Controller with Verilog
Platform: | Size: 1755136 | Author: monica-sun | Hits:

[VHDL-FPGA-Verilog] sdram_vhd_134

Description: This code is a SDRAM Controller IP Core for FPGA to interface with SDRAM Memory. This code is Verilog. This code is based Xilinx FPGA Playform.
Platform: | Size: 488448 | Author: peace | Hits:

[VHDL-FPGA-Verilog] ddrsdram_verilog

Description: 内附doc是DDR SDRAM 参考设计文档；model包含SDRAM Verilog的模型；simulation包含verilog测试平台、modelsim工程文、设计库函数；source包含verilog源文件；synthesis包含工程的综合文件 。-Enclosing the doc is a DDR SDRAM reference design documentation model contains SDRAM Verilog model simulation with verilog test platform, modelsim project text, design library function source contains the verilog source files synthesis comprehensive document that contains the project.
Platform: | Size: 751616 | Author: 陈少华 | Hits:

[VHDL-FPGA-Verilog] ddr-sdram

Description: DDR SDRAM控制器verilog代码及中文说明文档,对DDR开发很有用的哈。-Verilog source code for DDR SDRAM controler design,including guide book in chinese.
Platform: | Size: 923648 | Author: runxin | Hits:

[VHDL-FPGA-Verilog] SDRAMverilog

Description: SDRAM 驱动，Verilog HDL源码-SDRAM-driven, Verilog HDL source code
Platform: | Size: 297984 | Author: 刘越 | Hits:

[VHDL-FPGA-Verilog] SDRAMController

Description: xilinx公司SDRAM的参考设计,调试成功-xilinx' s SDRAM reference design, debug successful
Platform: | Size: 128000 | Author: 陈俊 | Hits:

[VHDL-FPGA-Verilog] Verilog-DRAM

Description: fpga(veriloh hdl)编写的SDRAM程序说明 -fpga(veriloh hdl)SDRAM
Platform: | Size: 1680384 | Author: SHIGANG | Hits:

[Other] mt48lc4m32b2

Description: SDRAM module Verilog HDL-SDRAM module Verilog HDL
Platform: | Size: 6144 | Author: Jack | Hits:

[VHDL-FPGA-Verilog] sdram_controler

Description: SDRAM 读写控制器的 verilog 三星公司源代码-verilog design for SDRAM read and write
Platform: | Size: 3072 | Author: yangyanwen | Hits:

[Other] ddr-sdram-verilog-resource

Description: 描述了ddr_sram的源代码,包括SDRAM的引脚功能介绍和Verilog在modulesim及quartus ii的实现-description the resource code of ddr_sram
Platform: | Size: 896000 | Author: wangyuzhuo | Hits:

[VHDL-FPGA-Verilog] ref-sdr-sdram-verilog

Description: SDRAM控制器，使用verilog编写-SDRAM controller, use the write verilog
Platform: | Size: 776192 | Author: yangbo | Hits:

[VHDL-FPGA-Verilog] sdram_controller

Description: SDRAM 控制器的 verilog 源代码, 针对Micron 的SDRAMS设计,支持全部的指令, 已经经过逻辑验证,并实际用在芯片设计中,作为一个模块,正常工作.-SDRAM controller verilog source code, for Micron' s SDRAMS designed to support all of the instructions, the logic has been verified, and actually used in chip design, as a module to work.
Platform: | Size: 9216 | Author: Jerd Hu | Hits:

[VHDL-FPGA-Verilog] ref-ddr-sdram-verilog

Description: ddr_sdram开发参考verilog建模-ddr_sdram with verilog
Platform: | Size: 753664 | Author: pengyong | Hits:

[VHDL-FPGA-Verilog] ref-sdr-sdram-verilog

Description: sdram的verilog 建模参考设计，希望有所帮助-sdram and verilog implent
Platform: | Size: 886784 | Author: pengyong | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: SDRAM控制器，Verilog代码编写，让你快速了解SDRAM的读写时序。包含Modelsim仿真工程和学习笔记-SDRAM controller, Verilog coding, allows you to quickly understand the SDRAM read and write timing. Modelsim simulation engineering and contains study notes
Platform: | Size: 3031040 | Author: jianzi | Hits:

[VHDL-FPGA-Verilog] SDRAMcontroler

Description: SDRAM控制器，Verilog代码以及相关文档-SDRAM controller, Verilog code, and related documentation
Platform: | Size: 1743872 | Author: 李涛 | Hits:
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